Digital precoding is an essential signal processing technique to enhance the performance of wireless Multiple Input Multiple Output (MIMO) communication systems. The scheme, however, imposes tremendous computing overheads in the form of matrix operations, which becomes a formidable barrier in real time processing. The technique presented in this poster is an efficient geometric mean decomposition (GMD) based precoding design capable of facilitating asymptotically equivalent performance of maximum likelihood detector (MLD). It requires no iterative singular value decomposition (SVD) as pre-processing and is thus exempted from the convergence problem. The divide-and-conquer approach reduces the computing complexity and provides abundant computing parallelism. The design features lower computing complexities, higher throughput rate, and hardware sharing between the pre-coding and the signal detection modules. In addition, the IP design is easily adaptable to different MIMO configurations and can be applied to various wireless communication systems such as 4G/5G and 802.11ac WiFi. A unified GMD/QRD chip using a fully parallel and deeply pipelined architecture is developed to verify the proposed design. One GMD or QRD computation on a 4×4 complex-valued matrix can be accomplished every 4 clock cycles. Chip implementation in TSMC 90nm CMOS technology shows that, with a maximum clock frequency up to 170MHz, the design can perform 42.5M GMD computations per second. The equivalent data rate is 1.02Gbps for a 64QAM modulation scheme.

Wireless Communication Baseband Chip, Digital Precoding, Geometric Mean Decomposition Scheme